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Fine-tuning nanowire crystalline interfaces for future photonic devices



Researchers from our laboratory [collaboration] publish their solution to create an interface between two crystals without generating dislocations, even though their mesh parameters differ by several percent. This work opens up new possibilities for integrated optoelectronics and photonics on silicon.

Published on 7 September 2020
Some of the toughest substances on Earth are crystals, in which planes of atoms arrange themselves in lattices held together by chemical bonds. Deforming a crystal is difficult without breaking bonds which degrade materials performance, be it for sturdiness such as in a bridge, or more subtle properties – for example the performance of a laser or a computer chip, where light or electrical current can stumble over defects created in a crystal. Heterostructures, or interfacing two semiconductor crystals, have sparked a high degree of interest since the creation of the first laser diodes as they form the backbone of optoelectronic and photonic devices.

Different crystals show a different organization of lattices. This results in a different atomic spacing or a different mesh parameter. When a junction is artificially created between two crystals, a natural way for materials to compensate for the difference in their atomic spacing is to compress and expand their crystal lattice at the interface, creating a mechanically stressed region, but this is also a way of introducing defects known as dislocations.
After having developed InAs-on-GaAs nanowire heterostructures on silicon [1], researchers from our laboratory, in collaboration with the Néel Institute, TU Eindhoven and the C2N, are publishing their solution [2] to create an interface between two crystals making sure that no dislocations are formed. They succeeded by using semiconductor nanowires, which are wire-shaped crystals smaller than a thousandth of the thickness of a human hair. In a nanowire there are few atoms in the cross-section, therefore, it is easier to deform the lattice. These nanowires grow as a forest on a silicon wafer. Two different materials can be easily combined even if their lattice parameter differ greatly (by several percent). Nevertheless, an excessive mechanical strain is not recommended, as it would strongly influence the electronic properties of the interface. Remarkably, the researchers obtain a stress reduction of several percent in the case of an interface of a few nanometers between the two crystals (formed by an alloy whose composition gradually varies from one material to another). They performed chemical and structural characterization of the interface by combining energy dispersive X-ray spectroscopy and high-resolution transmission electron microscopy. These experimental results are also compared with finite element calculations. The team confirm this very strong reduction in mechanical stress at the junction between two technologically important semiconductors: InAs and GaAs.

Finally, this work broadens the parameter space for the design of nanowire heterostructures, thus opening up new possibilities for integrated optoelectronics and photonics on silicon.


A. Superposition of 3 images of a GaAs/InGaAs nanowire:

1. image taken by transmission electron microscopy, 

2. coloured image showing the local deformation of the mesh parameter by the geometrical phase analysis method, and

3. moiré lattice showing deformed crystalline planes free of dislocations in the interface region.
The diameter of the nanowire is 20 nm and the difference in lattice parameter between GaAs and InGaAs is almost 6%. Geometric phase analysis maps the distortion of crystal planes perpendicular to the wire axis. In the case of dislocation-free growth, the elastic deformation mainly takes place on the side walls of the nanowire around the interface, while the core of the nanowire remains partially constrained.

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